A Static Random Access Memory (SRAM) is a type of semiconductor memory that uses bi-stable latching circuitry to store data. SRAM is usable to retain data, but remains volatile in the conventional sense that data is eventually lost when the memory is not powered. An SRAM circuit includes a plurality of SRAM memory cells. There are several types of SRAM memory cells, e.g., 6-transistor (6T) SRAM or dual-port 8-transistor (8T) SRAM. Usually, at least two of the transistors in an SRAM memory cell are controlled by a corresponding control line, also known as a “word line,” and used as switches to selectively couple the bi-stable latching circuitry of the SRAM memory cell with two data lines, also known as “bit line” and “bit line bar” or “bit line” and “complementary bit line.”
While writing data to a memory cell through corresponding data lines, in some circumstances, a dummy read occurs when the corresponding word line has caused the switches of the selected memory cell to be turned on in advance of the to-be-written data are applied to the data lines. As a result, the data previously stored in the selected memory cell are transferred to the corresponding data lines, and the write driver in some occasions needs to overwrite or flip the logic values on the data lines in order to successfully perform the write operation. When an SRAM circuit is designed to operate at a low power supply voltage, the write margin and operable speed of the SRAM memory cell is limited by many factors, including the capability of overwriting the logic values on the data lines imposed by the dummy read during a write operation.